Разделение схемы адресации в КМУУ с общей памятью

Abstract

A method for reducing the hardware amount in the circuit of CMCU with common memory is proposed oriented on FPGA technology. The method is based on the use of three sources of codes classes of pseudoequivalent OLC and a multiplexer to choose one of these sources. Such an approach would reduce the number of LUT elements in the addressing circuit of CMCU. An example of the proposed method application is given.